Pre-class Assignment
Complete participation activities for 13.1 – 13.2.
Announcements
- Assessment 1 has been graded
- If you did not pass, I will be giving you another chance to take it (likely the same day as Assessment 2 for ease of scheduling)
- Labs 1/2 will be graded over break
- Lab 2 checkoffs again tomorrow
- Please sign up for a slot even if you are not finished (one per group)
- Lab 3 is out and will be due Wednesday March 18th
- You will continue using the same breadboards. You do not need to disassemble your board unless you need space. Please do not throw out any supplies (other than “consumables” like wire/resistors/capacitors/electrodes).
- Do not forget to complete Challenge Activity 10.4.1 and 12.3.1 before the end of Lab 3
Learning Objectives and Outcomes
In this lecture, you will...
- review the answers from Assessment 1
- listen to a short lecture about converting sync. SMs to C/C++
- outline the definitions of common state machine terms and generate a list of best practices
By the end of this lecture, you should be able to...
- complete all of lab 3
- design your own concurrent syncSMs and convert them to C/C++
Lecture Content
Converting sync. SMs to C/C++
See 13.3, 13.4, 13.5.
Definitions of State Machines (In Class Activity)
| Type |
Definition |
Tick period |
# of SMs |
| Asynchronous SM |
|
|
|
| Synchronous SM |
|
|
|
| Concurrent Synch. SM |
|
|
|
| Concurrent Asynch. SM |
|
|
|